The present invention relates to a power supply voltage detection circuit for outputting a signal upon detecting a power supply voltage, and more particularly to an improvement thereon for preventing the signal from being erroneously output due to a sharp rise of the power supply voltage.
Referring to FIG. 19 and FIG. 20, a power supply voltage detection circuit 103 designed to detect a power supply voltage based on a predetermined voltage is typically used as a reset signal generation circuit for an arithmetic circuit 102 in a semiconductor integrated circuit 101, for example. Typically, when the power supply voltage is lower than or equal to a predetermined voltage Vo, the power supply voltage detection circuit 103 determines that the power supply voltage is not detected and thus outputs a xe2x80x98not detectedxe2x80x99 signal to inactivate the arithmetic circuit 102, whereas when the power supply voltage is higher than the predetermined voltage Vo, the power supply voltage detection circuit 103 determines that the power supply is detected and thus outputs a xe2x80x98detectedxe2x80x99 signal to activate the arithmetic circuit 102. In this way, the semiconductor integrated circuit 101 is operated properly.
Referring to FIG. 21, the power supply voltage detection circuit 103 includes a voltage division circuit 130 for outputting a signal of an output voltage A, a reference voltage circuit 131 for outputting a signal of a reference voltage B, and a comparison circuit 132 for comparing the output voltage A from the voltage division circuit 130 with the reference voltage B from the reference voltage circuit 131. The voltage division circuit 130 includes two resistors 113 serially connected between the power supply terminal and the ground terminal for linearly dividing the power supply voltage so as to output the output voltage A, which is the voltage at the division point. Since the output voltage A from the voltage division circuit 130 is a voltage obtained through a resistance-based division of the power supply voltage, the output voltage A changes in proportion to the power supply voltage, as illustrated in FIG. 22A. On the other hand, the reference voltage B from the reference voltage circuit 131 is defined to be equal to the output voltage A when the power supply voltage is equal to the predetermined voltage Vo, and the reference voltage B in its steady state is constant irrespective of the power supply voltage. Typically, when the output voltage A is lower than or equal to the reference voltage B, based on the comparison at the comparison circuit 132, it is determined that the power supply voltage is lower than or equal to the predetermined voltage Vo so as to output the xe2x80x98not detectedxe2x80x99 signal (low signal L in the illustrated example), whereas when the output voltage A is higher than the reference voltage B, it is determined that the power supply voltage is higher than the predetermined voltage Vo so as to output the xe2x80x98detectedxe2x80x99 signal (high signal H in the illustrated example). Thus, the waveform of the output voltage A and the waveform of the reference voltage B cross each other at a position where the power supply voltage is equal to the predetermined voltage Vo so as to form an intersection at the crossing point, so that the output signal is switched from one to another when crossing the intersection.
While the reference voltage circuit 131 is typically designed to output a reference voltage signal simultaneously with the rise of the power supply voltage, it takes a certain amount of time that is determined by the circuit configuration of the reference voltage circuit 131 before the reference voltage circuit 131 starts outputting a stable, constant reference voltage B. For example, where a band gap reference circuit is used as the reference voltage circuit 131, it takes a certain amount of time that is determined by the feedback circuit before the band gap reference circuit starts outputting a stable, constant voltage signal. If the power supply voltage rises sharply, the output voltage A may rise over, without crossing, the reference voltage B, thus forming no intersection between the waveform of the output voltage A and the waveform of the reference voltage B, as illustrated in FIG. 22B. In such a case, the power supply voltage detection circuit 103 always outputs the xe2x80x98detectedxe2x80x99 signal (high signal H) without outputting the xe2x80x98not detectedxe2x80x99 signal (low signal L), thereby failing to reset the semiconductor integrated circuit 101.
In the prior art, this problem has been addressed by adding a resistor 104 and a capacitor 105 to the power supply terminal external to the semiconductor integrated circuit 101, as illustrated in FIG. 19, or by adding a capacitor 105 having a large capacitance to the power supply terminal external to the semiconductor integrated circuit 101, as illustrated in FIG. 20. In this way, even when the power supply voltage rises sharply, the rise of the power supply voltage is gentle for the power supply voltage detection circuit 103 in the semiconductor integrated circuit 101, thereby ensuring that the xe2x80x98not detectedxe2x80x99 signal (low signal L) is output when appropriate.
However, when the resistor 104 and/or the capacitor 105 are provided external to the circuit, as in the conventional power supply voltage detection circuit 103, those external components increase the system cost and the mounting area.
An object of the present invention is to provide a power supply voltage detection circuit for outputting a signal upon detecting the power supply voltage by comparing, at a comparison circuit, an output voltage from a voltage division circuit with a reference voltage from a reference voltage circuit, with an improvement being made to the inside of the circuit such that it is ensured that a xe2x80x98not detectedxe2x80x99 signal is output when appropriate even when the power supply voltage rises sharply, without using external components which would otherwise increase the system cost and the mounting area.
In order to achieve the object, in one embodiment of the present invention, a signal to be input from the voltage division circuit to the comparison circuit is canceled or delayed until the power supply voltage reaches a predetermined voltage during the rise of the power supply voltage. Alternatively, in one embodiment of the present invention, the operation speed of the voltage division circuit is suppressed so as to slow down the rise of the output voltage. Alternatively, in one embodiment of the present invention, the unstable state of the reference voltage during the rise of the power supply voltage is utilized, by fixing the output signal of the power supply voltage detection circuit itself while the reference voltage is unstable.
Specifically, in one embodiment of the present invention, a power supply voltage detection circuit includes a voltage division circuit, a reference voltage circuit and a comparison circuit, wherein a second voltage is predetermined, and the power supply voltage detection circuit further includes signal cancellation means for canceling an input of an output voltage signal from the voltage division circuit to the comparison circuit when the power supply voltage is lower than the second voltage, while not canceling the input of the output voltage signal when the power supply voltage is higher than the second voltage.
In this way, during the rise of the power supply voltage, even if there is a period in which the input voltage from the voltage division circuit to the comparison circuit is lower than the reference voltage from the reference voltage circuit, whereby the output voltage from the voltage division circuit rises over, without crossing, the reference voltage during a sharp rise of the power supply voltage, the input voltage at the comparison circuit rises gently. Therefore, it is ensured that a xe2x80x98not detectedxe2x80x99 signal is output when appropriate. When the power supply voltage is higher than the second voltage, the cancellation operation by the signal cancellation means is stopped, whereby a xe2x80x98detectedxe2x80x99 signal is output as the power supply voltage rises. During the fall of the power supply voltage, an appropriate signal is output according to the power supply voltage.
In one embodiment of the present invention, it is determined that the power supply voltage is detected based on the first voltage when the power supply voltage is higher than the first voltage, while it is determined that the power supply voltage is not detected when the power supply voltage is lower than the first voltage, though the determination generally depends on the conditions of the circuit that is to receive the output signal from the power supply voltage detection circuit. The second voltage can be determined within a range which includes the first voltage and whose upper limit is the practical maximum value of the power supply voltage, according to the conditions of the circuit that is to receive the output signal from the power supply voltage detection circuit. However, it is preferred that the second voltage is close to the first voltage so as to facilitate the design of the circuit that is to receive the output signal from the power supply voltage detection circuit.
In one embodiment of the present invention, the power supply voltage detection circuit determines that the power supply voltage is not detected when the input voltage from the voltage division circuit to the comparison circuit is lower than or equal to the reference voltage from the reference voltage circuit, while determining that the power supply voltage is detected when the input voltage is higher than the reference voltage, wherein a PMOS transistor is provided between the voltage division circuit and the comparison circuit, the PMOS transistor including a source terminal connected to an output terminal of the voltage division circuit, a drain terminal connected to an input terminal of the comparison circuit, and a gate terminal connected to a power supply. The signal cancellation means is provided by the PMOS transistor.
In this way, during the rise of the power supply voltage, until the output voltage is higher than the threshold voltage of the PMOS transistor, i.e., until the power supply voltage is higher than the second voltage, the source-drain connection of the PMOS transistor is OFF, whereby the output voltage signal from the voltage division circuit is not passed to the comparison circuit. On the other hand, when the output voltage is higher than the threshold voltage, the source-drain connection of the PMOS transistor is ON, whereby the output voltage signal is input to the comparison circuit as in a case where the PMOS transistor is absent.
In one embodiment of the present invention, signal delay means for delaying the output voltage signal to be input from the voltage division circuit to the comparison circuit is provided instead of the signal cancellation means. In this way, the input voltage from the voltage division circuit to the comparison circuit rises gently. Thus, even when the power supply voltage rises sharply and the output voltage from the voltage division circuit rises over, without crossing, the reference voltage from the reference voltage circuit, the input voltage rises gently due to the delay on the output voltage signal. Therefore, it is ensured that the xe2x80x98not detectedxe2x80x99 signal is output when appropriate.
In one embodiment of the present invention, the power supply voltage detection circuit includes delay cancellation means for canceling the delay operation of the signal delay means when the power supply voltage is higher than the second voltage. In this way, during the fall of the power supply voltage that starts with the power supply voltage being higher than the second voltage, it is possible to prevent the response speed from decreasing due to the delay on the output voltage signal by the signal delay means.
In one embodiment of the present invention, voltage change suppression means for suppressing the rate of change of the output voltage from the voltage division circuit is provided instead of the signal cancellation means and the signal delay means. In this way, even when the power supply voltage rises sharply, the output voltage rises gently.
In one embodiment of the present invention, the power supply voltage detection circuit includes suppression cancellation means for canceling the suppression operation of the voltage change suppression means when the power supply voltage is higher than the second voltage. In this way, during the fall of the power supply voltage that starts with the power supply voltage being higher than the second voltage, it is possible to prevent the response speed from decreasing due to the suppression of the rate of change of the output voltage by the voltage change suppression means.
In one embodiment of the present invention, the power supply voltage detection circuit includes a capacitor and a switch as the voltage change suppression means and the suppression cancellation means, respectively. The capacitor and the switch are provided in series between the output terminal of the voltage division circuit and the second power supply. When the power supply voltage is lower than the second voltage, the switch is turned ON to charge the capacitor so as to suppress the rate of change of the output voltage. When the power supply voltage is higher than the second voltage, the switch is turned OFF to cancel the capacitor charging operation so as to allow the output voltage to change in proportion to the power supply voltage.
In one embodiment of the present invention, the power supply voltage detection circuit is designed so that the second voltage, based on which the voltage change suppression means is activated/inactivated by the suppression cancellation means, is equal to the predetermined first voltage, which is the threshold value for the detection of the power supply voltage by the power supply voltage detection circuit. In this way, the need for a special-purpose circuit for generating the second voltage is eliminated, thereby reducing the circuit scale accordingly.
In one embodiment of the present invention, the power supply voltage detection circuit determines that the power supply voltage is not detected when the output voltage is lower than or equal to the reference voltage, while determining that the power supply voltage is detected when the output voltage is higher than the reference voltage. Utilizing the fact that the output voltage and the reference voltage are equal to each other in the beginning of the rise of the power supply voltage, the voltage change suppression means is provided by a capacitor connected between the output terminal of the voltage division circuit and the second power supply, and the suppression cancellation means is provided by a switch connected in series with the capacitor between the output terminal of the voltage division circuit and the second power supply, wherein the switch is turned ON/OFF by the output of the comparison circuit, i.e., the output of the power supply voltage detection circuit. Specifically, the switch is turned ON by a xe2x80x98not detectedxe2x80x99 signal (e.g., a low signal) that is generated when the output voltage is lower than or equal to the reference voltage, and turned OFF by a xe2x80x98detectedxe2x80x99 signal (e.g., a high signal) that is generated when the output voltage is higher than the reference voltage.
In this way, in the beginning of the rise of the power supply voltage, the output voltage and the reference voltage are equal to each other and thus the switch is ON, thereby charging the capacitor so as to suppress the rate at which the output voltage from the voltage division circuit rises. On the other hand, in the beginning of the fall of the power supply voltage, the output voltage is higher than the reference voltage and thus the switch is OFF, thereby allowing the output voltage to change in proportion to the power supply voltage.
In one embodiment of the present invention, an unstable state of the reference voltage during the rise of the power supply voltage is utilized. Specifically, instead of the signal cancellation means, the signal delay means and the voltage change suppression means, the power supply voltage detection circuit includes a reference voltage determination circuit for determining whether or not the reference voltage is in a stable state in which the reference voltage is a constant voltage, so as to output a xe2x80x98reference unstablexe2x80x99 signal when it is determined that the reference voltage is not in the stable state and a xe2x80x98reference stablexe2x80x99 signal when it is determined that the reference voltage is in the stable state. The power supply voltage detection circuit further includes output fixing means for fixing the output signal of the power supply voltage detection circuit to a signal that indicates that the power supply voltage is not detected, when the xe2x80x98reference unstablexe2x80x99 signal is received from the reference voltage determination circuit, while not fixing the output signal when the xe2x80x98reference stablexe2x80x99 signal is received from the reference voltage determination circuit.
In this way, while the reference voltage is in the unstable state during the rise of the power supply voltage, the output signal is fixed to the xe2x80x98not detectedxe2x80x99 signal, whereby it is ensured that the xe2x80x98not detectedxe2x80x99 signal is output when appropriate even when the power supply rises sharply. During the fall of the power supply voltage in which the reference voltage is in the stable state, a high response speed as that achieved in the absence of the output fixing means is maintained. In addition, even when the power supply voltage rises gently, it is possible to prevent the xe2x80x98detectedxe2x80x99 signal from being erroneously output due to an unstable state of the reference voltage that causes the output voltage to rise over, without crossing, the reference voltage.
In one embodiment of the present invention, the output fixing means is provided by a switch connected between the comparison circuit and a power supply for the comparison circuit. The switch is turned OFF by the xe2x80x98reference unstablexe2x80x99 signal so as to cut off the power supply to the comparison circuit and to pull down the output of the comparison circuit, thereby fixing the output signal to the low signal, i.e., the xe2x80x98not detectedxe2x80x99 signal indicating that the power supply voltage is not detected.
In one embodiment of the present invention, a switch, as the output fixing means, is provided between the output terminal of the voltage division circuit and the second power supply, wherein the switch is turned OFF by the xe2x80x98reference unstablexe2x80x99 signal so as to short-circuit the output terminal of the voltage division circuit to the second power supply, thereby pulling down the output from the voltage division circuit and thus fixing the output signal.
In one embodiment of the present invention, a switch, as the output fixing means, is provided between the voltage division circuit and the first power supply, wherein the switch is turned OFF by the xe2x80x98reference unstablexe2x80x99 signal, thereby pulling down the output from the voltage division circuit and thus fixing the output signal to the low signal.